Name : Mrs. Shilpa K. Rudrawar
M. E. (VLSI and Embedded design), MIT-AOE, University of Pune, India, 2012.
B. E. (Electronics and Telecommunication)JDIET, Amaravati University, India 2004.
Diploma in Electronics and communication GRWPY, Dhamangon road, yavatmal, Maharashtra India(2001)
Overview of Profile:
Shilpa K. Rudrawaris an Assistant Professor in the Department of Electronics Engineering. Her inter- disciplinary interests are mechatronics, Process automation,VLSI Design.
Shilpa K. Rudrawarholds a Master’s degree in VLSI and Embedded design. Her project was on Design and Implementation of IL list processor for PLC in VHDL.
Fore Front Area of Research: VLSI Design
Email Id: firstname.lastname@example.org
Experience : Teaching :10
Awards and Achievements
Research / Patents / Publications
Mrs. Shilpa Rudrawar, Prof. Manish M. Patil, Design And Implementation Of FPGA Based High Performance Instruction List (IL) Processor”,IOSR Journal of Electronics and Communication Engineering (IOSRJECE) ISSN: 2278-2834 Volume 1, Issue 4 (May-June 2012), PP 38-45
Mrs.Shilpa Rudrawar, Prof. Manish M. Patil , DESIGN OF INSTRUCTION LIST (IL) PROCESSOR FORPROCESS CONTROL”,International Journal of Electronics and Computer Science EngineeringISSN- 2277-1956
Mrs. Shilpa Rudrawar, Prof. Manish M. Patil ,“Design of FPGA based Instruction List (IL) Processor”,e-PGCON 2012.